CWE-1342: Information Exposure through Microarchitectural State after Transient Execution
The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.
How it's found
Information Exposure through Microarchitectural State after Transient Execution is typically found by tracing untrusted input from where it enters the system to the point where it is used without the check or neutralization this weakness describes, combining manual code review with dynamic testing.
In many processor architectures an exception, mis-speculation, or microcode assist results in a flush operation to clear results that are no longer required. This action prevents these results from influencing architectural state that is intended to be visible from software. However, traces of this transient execution may remain in microarchitectural buffers, resulting in a change in microarchitectural state that can expose sensitive information to an attacker using side-channel analysis. For example, Load Value Injection (LVI) [REF-1202] can exploit direct injection of erroneous values into intermediate load and store buffers. Several conditions may need to be fulfilled for a successful attack:incorrect transient execution that results in remanence of sensitive information; attacker has the ability to provoke microarchitectural exceptions; operations and structures in victim code that can be exploited must be identified.
Consequences
- Modify Memory, Read Memory, Execute Unauthorized Code or Commands
Mitigations
- Architecture and Design/Requirements: Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.
- Build and Compilation: Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.
Where this fits in a TurboPentest engagement
This weakness is not covered by the automated black-box pentest. IntegSec pentesters cover it in a manual engagement.
Frequently asked questions
What is CWE-1342?
The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.
How do you find Information Exposure through Microarchitectural State after Transient Execution?
Information Exposure through Microarchitectural State after Transient Execution is typically found by tracing untrusted input from where it enters the system to the point where it is used without the check or neutralization this weakness describes, combining manual code review with dynamic testing.
What is the impact of CWE-1342?
Modify Memory, Read Memory, Execute Unauthorized Code or Commands
Does TurboPentest test for Information Exposure through Microarchitectural State after Transient Execution?
This weakness is not covered by the automated black-box pentest. IntegSec pentesters cover it in a manual engagement.
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Written and reviewed by
Michel Chamberland - Founder & CEO, IntegSec
CISSP, OSCP, OSCE, CEH, GIAC, CCSK · 20+ years in offensive security
Michel has spent 20+ years on offensive security teams including IBM X-Force Red and Trustwave SpiderLabs, leading penetration tests, red team engagements, and breach response for Fortune 500 customers. He is the founder of IntegSec and the architect of TurboPentest.
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