CWE-1224: Improper Restriction of Write-Once Bit Fields

How it's found

Improper Restriction of Write-Once Bit Fields is typically found by tracing untrusted input from where it enters the system to the point where it is used without the check or neutralization this weakness describes, combining manual code review with dynamic testing.

Integrated circuits and hardware IP software programmable controls and settings are commonly stored in register circuits. These register contents have to be initialized at hardware reset to define default values that are hard coded in the hardware description language (HDL) code of the hardware unit. A common security protection method used to protect register settings from modification by software is to make the settings write-once or "sticky." This allows writing to such registers only once, whereupon they become read-only. This is useful to allow initial boot software to configure systems settings to secure values while blocking runtime software from modifying such hardware settings. Failure to implement write-once restrictions in hardware design can expose such registers to being re-programmed by software and written multiple times. For example, write-once fields could be implemented to only be write-protected if they have been set to value "1", wherein they would work as "write-1-once" and not "write-once".

Vulnerable vs. safe

Data_out <= 16'h0000;Write_once_status <= 1'b0;

Data_out <= Data_in & 16'hFFFE;Write_once_status <= Data_in[0]; // Input bit 0 sets Write_once_status

Data_out[15:1] <= Data_out[15:1];Data_out[0] <= Write_once_status;if (~ip_resetn)beginendelse if (write & ~Write_once_status)beginendelse if (~write)beginendmodule register_write_once_example(input [15:0] Data_in,input Clk,input ip_resetn,input global_resetn,input write,output reg [15:0] Data_out);reg Write_once_status;always @(posedge Clk or negedge ip_resetn)endmodule

Data_out <= 16'h0000;Write_once_status <= 1'b0;

Data_out <= Data_in & 16'hFFFE;Write_once_status <= 1'b1; // Write once status set on first write, independent of input

Data_out[15:1] <= Data_out[15:1];Data_out[0] <= Write_once_status;if (~ip_resetn)beginendelse if (write & ~Write_once_status)beginendelse if (~write)beginendmodule register_write_once_example(input [15:0] Data_in,input Clk,input ip_resetn,input global_resetn,input write,output reg [15:0] Data_out);reg Write_once_status;always @(posedge Clk or negedge ip_resetn)endmodule

Consequences

• Varies by Context: System configuration cannot be programmed in a secure way.

Mitigations

• Architecture and Design: During hardware design, all register write-once or sticky fields must be evaluated for proper configuration.

Where this fits in a TurboPentest engagement

This weakness is not covered by the automated black-box pentest. IntegSec pentesters cover it in a manual engagement.

Frequently asked questions

Related CWEs

• Pillar weakness
  CWE-284: Improper Access Control